The present invention relates to a solid-state image pickup device having therein an analog/digital converter (ADC).
In recent years, a CMOS (Complementary Metal Oxide Semiconductor) image sensor having therein an ADC is actively being developed. The biggest problem of the CMOS image sensor is that, since all of information of pixels is converted to digital values, the data process amount is very large. It is unrealistic to process data by a single ADC, usually column ADCs are provided in correspondence with vertical read lines of columns, and a signal of a pixel of a selected row is AD converted by a corresponding column ADC.
The performances required by such a column ADC are higher precision and higher-speed operation. For example, Japanese Unexamined Patent Application Publication No. 2011-114785 (patent literature 1) discloses a method of satisfying both precision and conversion speed by combining low-precision high-speed AD conversion (coarse conversion) and high-precision low-speed AD conversion (fine conversion). It is also described that, to assure continuity of input/output characteristics in an input voltage range as a determination border (subrange border) of the coarse conversion, a redundant bit is provided in the fine conversion.
Patent Literature 1: Japanese Unexamined Patent Application Publication No. 2011-114785